System-on-Chip Security Validation and Verification / by Farimah Farahmandi, Yuanwen Huang, Prabhat Mishra. by Farahmandi, Farimah, Huang, Yuanwen, Mishra, Prabhat

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Hardware Security Training, Hands-on! by Mark Tehranipoor, N. Nalla Anandakumar, Farimah Farahmandi. by Tehranipoor, Mark, Anandakumar, N. Nalla, Farahmandi, Farimah

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Hardware Security Primitives by Mark Tehranipoor, Nitin Pundir, Nidish Vashistha, Farimah Farahmandi. by Tehranipoor, Mark, Pundir, Nitin, Vashistha, Nidish, Farahmandi, Farimah

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CAD for Hardware Security by Farimah Farahmandi, M. Sazadur Rahman, Sree Ranjani Rajendran, Mark Tehranipoor. by Farahmandi, Farimah, Rahman, M. Sazadur, Rajendran, Sree Ranjani, Tehranipoor, Mark

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Understanding Logic Locking by Kimia Zamiri Azar, Hadi Mardani Kamali, Farimah Farahmandi, Mark Tehranipoor. by Zamiri Azar, Kimia, Mardani Kamali, Hadi, Farahmandi, Farimah, Tehranipoor, Mark

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Hardware Security A Look into the Future / by Mark Tehranipoor, Kimia Zamiri Azar, Navid Asadizanjani, Fahim Rahman, Hadi Mardani Kamali, Farimah Farahmandi. by Tehranipoor, Mark, Zamiri Azar, Kimia, Asadizanjani, Navid, Rahman, Fahim, Mardani Kamali, Hadi, Farahmandi, Farimah

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Post-Silicon Validation and Debug edited by Prabhat Mishra, Farimah Farahmandi.

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